ChaCha20-in-Memory for Side-Channel Resistance in IoT Edge-Node Devices

IoT edge devices process the data collected, which can contain sensitive information related to user. It is crucial incorporate robust encryption algorithms considering resource and power budget of these devices. In this paper, we present a power-based SCA-resistant implementation ChaCha20 algorithm for low-end by utilizing memory arrays. The 10T SRAM-based performs simple operations (like NAND, NOR, XOR) on bitlines other like addition/subtraction, shifting, rotation custom-designed in-memory elements tightly coupled sense amplifiers (SA). design verified multiple test vectors generate consumption signatures. Welch’s t-test performed signatures demonstrate that highly resistant SCA. proposed runs at 250MHz 1.2V supply, in 65nm Low Standby Power (LSTP) technology, achieving speedup around 7 times terms execution time compared ARM Cortex A9 processor.